Microchip Real Estate, Skinny Nanorods

by Michael Mullaney on March 17, 2009

Rensselaer Professor Jian-Qiang “James” Lu is a world leader in integrated 3-D chip research. His work offers an interesting peek into the world of microchip real estate.

The current state of semiconductors and computer chips can be compared to the situation faced by big cities a century ago – there’s nowhere to go but up. Faced with denser populations and rapid development, the innovative engineers of yesteryear built the famous skylines of New York, Chicago, Shanghai, and other cities. These impossibly tall structures allowed even more individuals to live, work, and play in the city centers, and boosted the areas’ overall productivity and efficiency.

The development of computer chips, as guided by the venerable Moore’s Law, results in smaller and more powerful chips at highly forecasted and predictable intervals. The dictum dictates that the number of transistors on an integrated circuit, and in turn the chip’s processing power, should double every 18-24 months.

Unfortunately, the physical architecture of conventional computer chips cannot support this exponential growth indefinitely. As transistors and chips get smaller, the number of circuits and interconnects crammed onto the chip increases. Eventually, the electron scatter and the heat emitted from these growing populations of interconnects will inhibit the chip’s performance. If it’s too hot, the chip can’t work correctly. So to continue perpetuating Moore’s Law, this critical heat threshold must be held at bay.

There’s not much researchers can do about heat generation, electron scatter, or the laws of thermodynamics, as those basic principles of physics are well entrenched in the physical world. They also can’t do away with interconnects completely. What they can do, however, is re-engineer chips to need fewer interconnects. That’s where 3-D integration enters the picture.

One prominent solution, championed by Lu and others, is to create stacks of computer chips that literally lay on top of each other. Because of the physical proximity of the chips, the required number of interconnects decreases greatly. The trick is that interconnects and other circuitry run up and down vertically through the stack – like an elevator shaft.

The concept of 3-D integrated chips has taken root in academia and industry, but there are still a number of challenges to overcome. Professor Lu is known for his 3-D chip research. IBM has also made several key breakthroughs in 3-D integration.

Lu’s most recent research report was published in the journal Electrochemical and Solid-State Letters, coauthored with Rensselaer Research Assistant Pei-I Wang. Wang developed a new method for growing slimmer copper nanorods, which have the attractive property of melting at 300 degrees Celsius. Wang and Lu posit that these thin nanorods would be a good adhesive with which to bond together the different layers of a 3-D integrated chip. Heating the “chip sandwich” up to 300 degree would melt the nanorods and fuse the stacked layers together, but it’s a cool enough temperature where it wouldn’t damage or alter the properties of the chip’s delicate components. We issued a news release yesterday on the topic.

Wang and Lu’s paper draws heavily on a preceding paper, by Wang and Rensselaer professor Toh-Ming Lu, recently published in the journal Nanotechnology. This paper focuses on the fundamentals of growing thinner copper nanorods, which is accomplished by actually interrupting the growth process several times, breaking the vacuum the nanorods are grown in, and exposing the rods to air. The oxygen in air acts upon the very tops of the rods, making them “stickier” to copper atoms. When the vacuum is resealed and the growth process resumed, the copper atoms being deposited fall onto the oxygen-laden tops of the fledgling nanorods. Because the oxygen creates a “sticky” surface, the copper atoms are prevented from falling down the side of a nanorod and adding to its width or diameter. Instead, the atoms simply accumulate on top of the nanorods, making it tall and skinny.

Below are scanning electron microscope images that clearly illustrate the effects of this new process. All three images were taken at the same magnification, but the nanorods vary in size considerably. The top image shows copper nanorods that have been grown without interruption (top), the middle image shows rods grown with two interruptions, and the bottom photo shows rods growth with six interruptions.